1. Field of the Invention
The present invention relates to a resin-sealed semiconductor device and, more particularly, to a resin-sealed semiconductor device of an LOC (Lead-On-Chip) arrangement suitable for mounting on a semiconductor chip having a large-scale integrated circuit.
2. Description of the Prior Art
In packages of the prior art, in order to have a semiconductor chip constantly increasing in scale mounted in a standardized package size, there are proposed packages of the so-called LOC arrangement for example in Japanese Patent Laid-open No. 61-241959 and Japanese Patent Laid-open No. 2-246125.
The package of the LOC arrangement provides a resin-sealed semiconductor device in which inner leads extended from outer leads are cemented to the circuit forming surface of a semiconductor chip through a film insulator, common conductors engaged With the inner leads are disposed on the film insulator, and pad electrodes formed on a portion of the semiconductor chip uncovered by the film insulator are electrically connected with the inner leads and the common conductors by bonding wires or the like.
In the above described resin-sealed semiconductor device, the inner leads engaged with the common conductors are those of power supply system such as a power supplying inner lead (Vcc) and a grounding inner lead (Vss). The number and positions of the inner leads of power supply system engaged with the common conductors are specified in a standard prescribing the lead terminal names.
Accordingly, when the number of the inner lead of power supply system engaged with the common conductor is one, for example when the package is of an SOJ (Small Out-line J-bend) type, if the number of the outer lead of power supply system located in the center of one side of the package is one, the inner lead formed of the common conductor and the inner lead of power supply system have a T-shaped configuration and, in addition, both ends of the common conductor being the top bar of the letter T are not coupled with any other inner leads. Therefore, a twist of the common conductor around the inner lead of power supply system is liable to occur.
On the other hand, when there are a pair of outer leads of power supply system (Vcc outer lead and Vss outer lead) located in the center of one side of a package of the SOJ type, the configurations of the inner leads formed of the common conductors and the inner leads of power supply system become L-shaped connected only with the outer leads independent of each other. Hence, as a matter of course, twists are equally liable to occur.
Further, when the number of the outer leads of the same power supply system located at one side of an SOJ package is two and they are disposed at both ends of the side, the configuration of the inner lead formed of the common conductor and the inner leads of power supply system becomes .pi.-shaped. Though a certain improvement in preventing occurrence of a twist is shown in this case over that of the T-shaped or L-shaped configuration, it is impossible to thoroughly eliminate the twist.
When a twist is present at the portion of the inner lead transforming into the common conductor, there is the possibility that the adhesive strength between the insulator and the inner lead or the common conductor becomes ununiform and the top surfaces of the end portion of the inner lead and the common conductor become different in level, and eventually an inclination is produced in the semiconductor chip.
As a consequence of the foregoing, there has been the possibility in executing the wire bonding that stabilized wire bonding becomes unachievable because supersonic energy is not transmitted effectively and a bonding wire crossing over the common conductor comes in touch with it and causes a short because the common conductor is rising. Further, when the semiconductor chip is inclined, there has been the possibility in the injection of sealing resin that great imvalance is produced between the flowing speed of the resin at the upper portion of the chip and that at the lower portion of the chip and, hence, failure in resin forming is produced such as a resin-unfilled portion or a void of resin.
An object of the present invention is to provide a resin-sealed semiconductor device, in which, even if a large number of outer leads of power supply system are used and they are disposed in various positions, stabilized wire bonding and stabilized resin forming can be performed.